This invention relates to a time slot switching or relocating device for use in time division multiplex communication in dealing with a multiframe signal.
In the manner which will become clear as the description proceeds, such a time slot switching device is supplied with an input data signal and produces an output data signal. The input data signal comprises data time slots featured by a first plurality of attributes and comprises successions of unit frames, which successions are multiplexed into the multiframe signal. Each unit frame comprises a contiguous part of the data time slots as a second plurality of frame time slots. In each unit frame of the output data signal, the frame time slots are switched or relocated into switched time slots in accordance with the attributes.
As will later be described a little more in detail, a conventional time slot switching device comprises data memories, the first plurality in number. In one-to-one correspondence, the data memories are accompanied by write address generators and read address generators. Each write address generator generates a write address signal. Each read address generator generates a read address signal.
The input data signal is supplied to a particular memory of the data memories. Generated by one of the write address generators that corresponds to the particular memory, the write address signal stores a predetermined number of the data time slots in the particular memory as stored time slots or stored data. Generated by one of the read address generators that corresponds to the particular memory, the read address signal reads the stored data as a particular output signal. The particular output signal is supplied to other memories, namely, to others of the data memories.
Generated by others of the write address generators, the write address signals store the particular output signal in the other memories as different stored data. Generated by others of the read address generators, the read address signals read the different stored data as different output signals.
The different output signals are delivered to phase adjusting circuits, the first plurality less one in number. The phase adjusting circuits are consequently in one-to-one correspondence to the different output signals.
The different output signals have phases subjected to phase adjustment and are produced as phase adjusted signals by the phase adjusting circuits corresponding thereto. With the phases so adjusted, the different output signals are superposed on the input data signal. The particular and the different output signals are collectively used as the output data signal.
The conventional time slot replacing device has had several disadvantages which are objectionable particular when the input data signal is featured by a great number of attributes. For example, the conventional time slot switching device must have an enormous hardware scale, suffers from a complicated control, and produces the output data signal with an undesiredly long delay.